Design and Simulation of Track/Hold Circuit with CMOS FET for Particle Detector
doi: 10.11804/NuclPhysRev.27.04.459
- Received Date: 1900-01-01
- Rev Recd Date: 1900-01-01
- Publish Date: 2010-12-20
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Key words:
- Track/Hold /
- CMOS transistor /
- peak value /
- simulation
Abstract: In this paper, the objective is to realize a Track/Hold Circuit for silicon strip, Si(Li), CdZnTe and CsI detectors etc. By using CMOS transistor to implement various components in electronic circuit, the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated. Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus. Several measurements of acquisition time can be made from 60 ns to 4.44us related to the output resistance, and the integral nonlinearity is good.
Citation: | WEMBE TAFO Evariste, SU Hong, QIAN Yi, ZHOU Chao-yang, WANG Tong-xi. Design and Simulation of Track/Hold Circuit with CMOS FET for Particle Detector[J]. Nuclear Physics Review, 2010, 27(4): 459-463. doi: 10.11804/NuclPhysRev.27.04.459 |