Design of a High-speed Serializer with a Domestic CMOS Process

This paper designs a 20:1 Serializer for a 5 Gbps SerDes (Serializer/DESerializer) ASIC fabricated using China's domestic GSMC 130 nm CMOS process. This Serializer converts the 20-bit 250 Mbps parallel data into 1-bit 5Gbps serial data. It consists of one stage of 5:1 conversion module and two stages of 2:1 conversion module. The clocks are provided by a multi-phase clock generator and a frequency divider. Post-simulations with all process corners, the temperature is from −40 °C to 100 °C and supply voltage is from 1.08 to 1.32 Volt, show this Serializer functions correctly and can generate a clear eye diagram at 5 Gbps, which fulfills the design requirements. Mainly, simulation with the typical process corner, the temperature at 27 °C, and supply voltage at 1.2 Volt show that the total power dissipation is 39.12 mW, the total jitter is 8.34 ps, and the output voltage rail-to-rail is 800 mV.