Design of Front-end Chip Batch Test System for LHAASO WCDA
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Graphical Abstract
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Abstract
In the readout electronics for the Water Cerenkov Detector Array(WCDA) of the Large High Altitude Air Shower Observatory(LHAASO), both high precision time and charge measurement are required. A front-end readout chip PASC(Pre-Amplifier and Shaping Circuit) ASIC(Application Specific Integrated Circuit)is designed, and will be actually applied in the third water pond of the WCDA. In order to evaluate the performance of the chips after massive production, it is important to design an automatic test system. This paper presents the design of the ASIC test system, which is used to achieve automatic testing of the time and charge measurement performance of the chips. After a brief introduction of the chip under test, the design scheme and structure of the test system is presented, including the hardware circuits and test software. This system has been applied in batch test of the LHAASO project, and 100 chips have been successfully tested. It can communicate with multiple instruments through the central control software to perform instrument control and complete automated testing and data recording. This automated test method is more suitable for performance testing and evaluation of high precision readout chips under a large dynamic range, which greatly simplifies the test process and can greatly improve the work efficiency of a large number of repetitive test steps in batch test. The test results show that the performance of these chips meet the application requirements of the third pond of the WCDA in LHAASO.
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