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塑料闪烁体阵列探测器读出ASIC中峰值保持电路的设计

Design of Peak Holding Circuit in Readout ASIC of PSD

  • 摘要: 塑料闪烁体阵列探测器(PSD,简称塑闪阵列探测器)的输出信号经过前置放大器和滤波成形电路后输出准高斯波形,利用峰值保持电路可对准高斯波形信号的峰值进行采样和保持,以便后续的电子学系统对其进行进一步的分析。本工作采用180 nm CMOS工艺设计并实现了一款峰值保持电路ASIC芯片,每通道主要由跨导放大器(OTA)、电流镜和充电电容三部分电路组成。实验室电子学功能和性能测试结果表明:峰值保持电路功能良好;输入动态范围为33~940 mV,非线性误差优于0.8%,下垂速率好于8.6 μV/μs,峰值探测延迟时间小于35 ns,芯片单通道静态功耗为825 μW,达到设计要求。

     

    Abstract: The output signal of PSD(plastic scintillation detector) is fed to the preamplifier and the shaping circuit to output a quasi-Gaussian waveform. The peak holding circuit can be used to sample and hold the peak value of the quasi-Gaussian waveform signal, so that the subsequent electronic system can further analyze it. This paper presents a peak holding circuit ASIC(application specific integrated circuit) chip which is designed based on 180 nm CMOS technology. Each channel of the ASIC includes an OTA(Operational Transconductance Amplifier) circuit, a current mirror circuit, and a charging capacitor. Laboratory electronics function and performance test results indicate that the function of the peak hold circuit is achieved. The input dynamic range is 33~940 mV, and the nonlinear error is better than 0.8%. The droop rate is better than 8.6 μV/μs, the peak detection delay time is lower than 35 ns, and the single-channel power consumption of the chip is 825 μW, which meets the design requirements.

     

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