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王德娴, 赵雷, 龚震, 董若石, 曹喆, 刘树彬, 安琪. LHAASO WCDA前端芯片批量测试系统的设计[J]. 原子核物理评论, 2020, 37(2): 191-198. DOI: 10.11804/NuclPhysRev.37.2020024
引用本文: 王德娴, 赵雷, 龚震, 董若石, 曹喆, 刘树彬, 安琪. LHAASO WCDA前端芯片批量测试系统的设计[J]. 原子核物理评论, 2020, 37(2): 191-198. DOI: 10.11804/NuclPhysRev.37.2020024
Dexian WANG, Lei ZHAO, Zhen GONG, Ruoshi DONG, Zhe CAO, Shubin LIU, Qi AN. Design of Front-end Chip Batch Test System for LHAASO WCDA[J]. Nuclear Physics Review, 2020, 37(2): 191-198. DOI: 10.11804/NuclPhysRev.37.2020024
Citation: Dexian WANG, Lei ZHAO, Zhen GONG, Ruoshi DONG, Zhe CAO, Shubin LIU, Qi AN. Design of Front-end Chip Batch Test System for LHAASO WCDA[J]. Nuclear Physics Review, 2020, 37(2): 191-198. DOI: 10.11804/NuclPhysRev.37.2020024

LHAASO WCDA前端芯片批量测试系统的设计

Design of Front-end Chip Batch Test System for LHAASO WCDA

  • 摘要: LHAASO(Large High Altitude Air Shower Observatory)WCDA(Water Cerenkov Detector Array)要求其读出电子学实现大动态范围下精确的时间和电荷测量,为此设计了一款前端读出芯片PASC(Pre-Amplifier and Shaping Circuit) ASIC(Application Specific Integrated Circuit),即将用于LHAASO WCDA第三水池的读出。为了满足对此芯片大批量测试需求,设计了此ASIC测试系统,实现了对芯片时间和电荷性能的自动化测试。在介绍此芯片基本工作原理的基础上,讨论了测试系统的设计方案和基本结构,包括硬件电路设计和自动化测试软件设计。该测试系统已应用于LHAASO工程项目的芯片筛选并且已完成了100片芯片的测试工作,能够通过中央控制软件,与多台仪器通讯,进行仪器控制,完成自动化测试和数据记录。这一自动化测试方法,更适用于大动态范围下、高精度读出芯片的性能测试和评估,大大简化测试流程,尤其能够大幅提升批量测试中大量重复性测试步骤的工作效率。文中展示了基于此测试系统已完成的100片芯片的测试结果,结果表明,芯片各项性能参数满足LHAASO第三水池工程应用需求。

     

    Abstract: In the readout electronics for the Water Cerenkov Detector Array(WCDA) of the Large High Altitude Air Shower Observatory(LHAASO), both high precision time and charge measurement are required. A front-end readout chip PASC(Pre-Amplifier and Shaping Circuit) ASIC(Application Specific Integrated Circuit)is designed, and will be actually applied in the third water pond of the WCDA. In order to evaluate the performance of the chips after massive production, it is important to design an automatic test system. This paper presents the design of the ASIC test system, which is used to achieve automatic testing of the time and charge measurement performance of the chips. After a brief introduction of the chip under test, the design scheme and structure of the test system is presented, including the hardware circuits and test software. This system has been applied in batch test of the LHAASO project, and 100 chips have been successfully tested. It can communicate with multiple instruments through the central control software to perform instrument control and complete automated testing and data recording. This automated test method is more suitable for performance testing and evaluation of high precision readout chips under a large dynamic range, which greatly simplifies the test process and can greatly improve the work efficiency of a large number of repetitive test steps in batch test. The test results show that the performance of these chips meet the application requirements of the third pond of the WCDA in LHAASO.

     

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