HIRFL-CSR前端总线控制器的改进设计
Improved Design of HIRFLCSR EVME Bus Controller
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摘要: 论述了用于兰州重离子加速器冷却存储环(HIRFLCSR)控制系统的前端总线系统控制器的改进。 改进了控制器的嵌入式操作系统和应用程序， 开发了控制器和数据库交换数据的应用程序。 该控制器基于BGA封装的ARM920T(ARM9)处理器和嵌入式的LINUX操作系统， 可以连接标准的VGA显示器、 键盘、 鼠标， 采用了现场可编程的FPGA器件进行背板接口设计， 并具有64 mA高驱动能力的总线驱动器， 以及拥有灵活的接口信号定义可编程能力， 是HIRFLCSR控制系统的关键部件。 The EVME bus controller which is a key component of the HIRFLCSR control system was improved . Besides reconfiguring the embedded Linux， a utility program was developed for data exchange between the controller and the database. The bus controller is based on ARM920T(ARM9) micro processor which is BGA packaged. The bus controller has the universal interface of VGA display， keyboard， and mouse. The backboard interface logic is programmed in an insystem configurable FPGA device. The bus can drive high current up to 64 mA， with the flexibility of the programmable signal definitions. All the improved performance helped the EVME bus controller play a crucial role in HIRFLCSR control system.Abstract: The EVME bus controller which is a key component of the HIRFLCSR control system was improved . Besides reconfiguring the embedded Linux， a utility program was developed for data exchange between the controller and the database. The bus controller is based on ARM920T(ARM9) micro processor which is BGA packaged. The bus controller has the universal interface of VGA display， keyboard， and mouse. The backboard interface logic is programmed in an insystem configurable FPGA device. The bus can drive high current up to 64 mA， with the flexibility of the programmable signal definitions. All the improved performance helped the EVME bus controller play a crucial role in HIRFLCSR control system.
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