用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)

WEMBE TAFO Evariste; 苏弘; 千奕; 周朝阳; 王同喜

doi:10.11804/NuclPhysRev.27.04.459

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用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)

WEMBE TAFO Evariste, 苏弘, 千奕, 周朝阳, 王同喜

文章导航 > 原子核物理评论 > 2010 > 27(4): 459-463

WEMBE TAFO Evariste, 苏弘, 千奕, 周朝阳, 王同喜. 用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)[J]. 原子核物理评论, 2010, 27(4): 459-463. doi: 10.11804/NuclPhysRev.27.04.459

引用本文:

WEMBE TAFO Evariste, SU Hong, QIAN Yi, ZHOU Chao-yang, WANG Tong-xi. Design and Simulation of Track/Hold Circuit with CMOS FET for Particle Detector[J]. Nuclear Physics Review, 2010, 27(4): 459-463. doi: 10.11804/NuclPhysRev.27.04.459

Citation:

WEMBE TAFO Evariste, SU Hong, QIAN Yi, ZHOU Chao-yang, WANG Tong-xi. Design and Simulation of Track/Hold Circuit with CMOS FET for Particle Detector[J]. Nuclear Physics Review, 2010, 27(4): 459-463. doi: 10.11804/NuclPhysRev.27.04.459

用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)

doi: 10.11804/NuclPhysRev.27.04.459

1 中国科学院近代物理研究所, 甘肃兰州 730000; 2 杜阿拉大学物理系, 杜阿拉24157, 喀麦隆

Design and Simulation of Track/Hold Circuit with CMOS FET for Particle Detector

1 Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou 730000, China; 2 Department of Physics, University of Douala, Douala 24157, Cameroon

摘要: 介绍了一个峰保持电路。该电路适用于silicon strip, Si(Li), CdZnTe and CsI 等探测器，实现采样保持功能。已成功进行了基于CMOS FET的采样保持电路的设计和仿真，通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真。同时，实现了采样时间可在 60 ns 到 4.44 ??s范围内进行选择，该电路具有较好的线性。In this paper, the objective is to realize a Track/Hold Circuit for silicon strip, Si(Li), CdZnTe and CsI detectors etc. By using CMOS transistor to implement various components in electronic circuit, the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated. Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus. Several measurements of acquisition time can be made from 60 ns to 4.44us related to the output resistance, and the integral nonlinearity is good.
- 采样保持 /
- CMOS场效应管 /
- 峰值 /
- 仿真
Abstract: In this paper, the objective is to realize a Track/Hold Circuit for silicon strip, Si(Li), CdZnTe and CsI detectors etc. By using CMOS transistor to implement various components in electronic circuit, the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated. Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus. Several measurements of acquisition time can be made from 60 ns to 4.44us related to the output resistance, and the integral nonlinearity is good.
- Track/Hold /
- CMOS transistor /
- peak value /
- simulation

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用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)

doi: 10.11804/NuclPhysRev.27.04.459

1 中国科学院近代物理研究所, 甘肃兰州 730000; 2 杜阿拉大学物理系, 杜阿拉24157, 喀麦隆

收稿日期: 1900-01-01
修回日期: 1900-01-01
刊出日期: 2010-12-20

关键词:

采样保持 /

CMOS场效应管 /

峰值 /

仿真

摘要: 介绍了一个峰保持电路。该电路适用于silicon strip, Si(Li), CdZnTe and CsI 等探测器，实现采样保持功能。已成功进行了基于CMOS FET的采样保持电路的设计和仿真，通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真。同时，实现了采样时间可在 60 ns 到 4.44 ??s范围内进行选择，该电路具有较好的线性。In this paper, the objective is to realize a Track/Hold Circuit for silicon strip, Si(Li), CdZnTe and CsI detectors etc. By using CMOS transistor to implement various components in electronic circuit, the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated. Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus. Several measurements of acquisition time can be made from 60 ns to 4.44us related to the output resistance, and the integral nonlinearity is good.